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4307cs?scr?03/07 features ? host interface ? usb (compliant with usb 1.1 and 2.0, ccid supported) ? transmission speed: usb: 12 mbit/sec ? customer specific usb-descriptors ?serial ? smart card interface ? smart card interface compliant with iso 7816 and emv 2000 ? support of t=0, t=1, twi (s=8), 2-wi re: sle 4432/42 (s=10), 3-wire: sle4418/28 (s=9), others on request ? high performance smart card interface ? supports 5v, 3v and 1.8v smart cards ? supply current 60 ma to power the smart card ? smart card movement detect ion with auto power-off ? automatic detection of smart card type ? short circuit and thermal protection ? 8-pin handling (c4/c8 supported) ? compliance ? whql (microsoft) certified ? emv 2000 (europay, mastercard, visa) certified ? usb 1.1 and 2.0 ? usb ccid ? iso 7816 ? hbci ? other features ? fast and easy certification process ? supports led status indicator (green: ready; red: busy) ? secure pin entry (spe) ? pc/sc driver support ? windows 98/me? ? windows 2000? ? windows xp? ? windows ce 3.0?/ce.net (depending on hardware) ? windows nt? 4.0 (on request) ?linux? ?macos x? ? operating voltage ? 3.0v - 5.5v ? temperature ?-40c to +85c ? packages ? 32-pin vqfp or 32-pin qfn cardman ? smart@link at83c23ok summary this is a summary document. a complete document can be found on the omnikey web site.http://omnikey.aaitg.com
2 at83c23ok 4307cs?scr?03/07 description smart cards are increasingly being used fo r payments, home-banking, access control, internet security, pkitokens, health care, loyalty, etc. the cardman smart@link chip set is a ready to use precertified smart card reader inter- face, that can be implemented into usb hosts. it facilitates hardware integrators by reducing time-to-market and offers a un ique opportunity to quickly and easily include smart card reader functionality in systems li ke pcs, notebooks, keyboards, smart card based dongles, monitors, mice, pdas, thin clients, biometric devices etc. the already existing certifications and co mpliances guarantee a fast and easy certification process. with its high performance smart card interface cardman smart@link supports smart- card technology of the future. the integration in any usb system can be ea sily done without any firmware or software (driver) development, simply by embed ding the cardman smart@link design and chipset into the target system. the usb cci d support makes this process the easiest ever by connecting host and smart card re ader systems without the need of additional drivers. cardman smart@link combines atmel?s at83c5123 microcontroller and omnikey firmware. for detailed information on the omnikey firmware, please refer to the omnikey web site: http://omnikey.aaitg.com . in addition to the summary information contai ned in this document, please refer to the at83c5123 datasheet for complete product info rmation. this document is available on the atmel web site www.atmel.com .
3 at83c23ok 4307cs?scr?03/07 pin configurations figure 1. vqfp32 package pinout figure 2. qfn32 package pinout cio vqfp32 p3.1/txd cclk p5.0 cc4 dvcc cc8 xtal1 li vcc p3.7/led3 cvcc cvss p3.6/led2 crst p1.2/cpres d- d+ avcc avss pllf p3.4/t0/led1 p3.0/rxd 28 27 26 1 2 3 4 5 6 7 24 23 22 21 20 19 18 12 11 10 9131415 vss 8 16 17 p1.6 p3.5/t1/crst1 p1.7/cclk1 vref 25 29 30 31 32 xtal2 rst p3.2/int0/led0/cio1 p3.3/int1 cio qfn32 p3.1/txd cclk p5.0 cc4 dvcc cc8 xtal1 li vcc p3.7/led3 cvcc cvss p3.6/led2 crst p1.2/cpres d- d+ avcc avss pllf p3.4/t0/led1 p3.0/rxd 28 27 26 1 2 3 4 5 6 7 24 23 22 21 20 19 18 12 11 10 9131415 vss 8 16 17 p1.6 p3.5/t1/crst1 p1.7/cclk1 vref 25 29 30 31 32 xtal2 rst p3.2/int0/led0/cio1 p3.3/int1
4 at83c23ok 4307cs?scr?03/07 pin description table 1. pin description port vqfp32 qfn32 internal power supply esd i/o reset level alt cio 32 32 cvcc 6kv i/o 0 card interface-i/o pin cvcc inactive at reset . esd tested with 10f on cvcc. an external pull-up of 4.7k is recommended to support icc?s with too high internal pull-ups. cc8 3 3 cvcc 6kv i/o 0 card interface-c8 pin cvcc inactive at reset. esd tested with 10f on cvcc. cpres 2 2 vcc 2kv i/o 1 card presence signal if p3.4 pin is connected to gnd, the card inserted information generates a high level on cpres pin. else, a low level on this pin indicates that a card is inserted. cc4 5 5 cvcc 6kv i/o 0 card interface-c4 pin cvcc inactive at reset. esd tested with 10f on cvcc. cclk 6 6 cvcc 6kv o 0 card interface-clk pin cvcc inactive at reset. esd tested with 10f on cvcc. crst 4 4 cvcc 6kv o 0 card interface-rst pin cvcc inactive at reset. esd tested with 10f on cvcc. p1.6 23 23 vcc 2kv i/o 1 for serial reader: connect this to gnd. for usb reader: leave this pin unconnected. p1.7 31 31 vcc 2kv i/o 1 leave this pin unonnected p3.0 22 22 vcc 2kv i/o 1 for serial reader: rxd: connect this pin to the host txd signal. for usb reader: connect this pin to gnd. p3.1 24 24 vcc 2kv i/o 1 for serial reader: txd: connect this pin to the host rxd signal. for usb reader: leave this pin unconnected. p3.2 20 20 vcc 2kv i/o 1 for serial reader: int0: connect this pin to host rts signal. for usb reader: connect this pin to gnd. p3.3 19 19 vcc 2kv i/o 1 for serial reader: leave this pin unconnected. for usb reader: connect this pin to gnd. p3.4 18 18 vcc 2kv i/o 1 eject signal to support the eject of the smart card under control of the application. please refer to design-in manual fo r additionnal information. this pin indicates also the polarity of card insertion signal. p3.5 21 21 vcc 2kv i/o 1 for serial reader: connect this to gnd. for usb reader: leave this pin unconnected. scl 17 17 vcc 2kv i/o 1 twi expansion (i2c compliant) may be used for memory extension, parallel port expanders and more. please refer to the design-in manual. sda 13 13 vcc 2kv i/o 1
5 at83c23ok 4307cs?scr?03/07 rst 16 16 vcc i/0 reset input the port pins are driven to their reset conditions when a voltage lower than v il is applied, whether or not the oscillator is running. this pin has an internal 10k pull-up resistor which allows the device to be reset by connecting a capacitor between this pin and vss. asserting rst when the chip is in idle mode or power-down mode returns the chip to normal operation. the output is active for at least 12 oscill ator periods when an internal reset occurs. d+ 29 29 dvcc i/o for serial reader: connect this pin to gnd. for usb reader: usb positive data upstream port this pin requires an external serial resistor of 27 (at8xc122) or 33 (at83c5123) and a 1.5 k pull-up to v ref for full speed configuration. d- 28 28 dvcc i/o for serial reader: connect this pin to gnd. for usb reader: usb negative data upstream port this pin requires an external serial resistor of 27 (at8xc122) or 33 (at83c5123) v ref 30 30 avcc o for serial reader: leave this pin unconnected. for usb reader: usb voltage reference : 3.0 < v ref < 3.6 v v ref can be connected to d+ through a 1.5 k resistor. the v ref voltage is controlled by software. xtal1 14 14 vcc i input to the on-chip inverting oscillator amplifier to use the internal oscillator, a crystal or an external oscillator must be connected to this pin. xtal2 15 15 vcc o output of the on-chip inve rting oscillator amplifier to use the internal oscillator, a crystal ci rcuit must be connected to this pin. if an external oscillator is used, leave xtal2 unconnected. pllf 26 26 avcc o pll low pass filter input receives the rc network of the pll low pass filter. avcc 27 27 pwr analog supply voltage avcc is used to supply the internal 3. 3v analog regulator which supplies the internal usb driver vcc 12 12 pwr supply voltage vcc is used to supply the internal 3.3v digital regulator which supplies the pll, cpu core and internal i/o?s li 10 10 pwr dc/dc input li supplies the current for the charge pump of the dc/dc converter. - li tied directly to vcc : the dc/dc converter must be configured in regulator mode. - li tied to vcc through an external 10h coil : the dc/dc converter can be configured either in regulator or in pump mode. cvcc 9 9 pwr card supply voltage cvcc is the ouput of internal dc/dc converter which supplies the smart card interface. it must be connected to an external decoupling capacitor of 10 f with the lowest esr as this parameter influences on the cvcc noise table 1. pin description (continued) port vqfp32 qfn32 internal power supply esd i/o reset level alt
6 at83c23ok 4307cs?scr?03/07 dvcc 1 1 pwr digital supply voltage dvcc is the output of the internal analog 3.3v regulator which supplies the usb driver. this pin must be connected to an external 680nf decoupling capacitor if the usb interface is used. this output can be used by the application with a maximum of 10 ma. cvss 11 11 gnd dc/dc ground cvss is used to sink high shunt currents from the external coil vss 8 8 gnd digital ground vss is used to supply the pll, buffer ring and the digital core avss 25 25 gnd analog ground avss is used to supply the usb driver. table 1. pin description (continued) port vqfp32 qfn32 internal power supply esd i/o reset level alt
7 at83c23ok 4307cs?scr?03/07 electrical characteristics absolute maximum ratings dc parameters t a = -40 to +85 c; v ss = 0 v, f ck_cpu = 0 to 24 mhz , v cc = 3.0v to 5.5v ambiant temperature under bias ............ ..........-25 c to 85 c storage temperature .................................... -65 c to + 150 c voltage on v cc to v ss ......................................-0.5 v to + 6.0v voltage on any pin to v ss ........................-0.5 v to v cc + 0.5 v power dissipation 1 w note: stresses at or above those listed under ?absolute maximum ratings? may cause permanent damage to the device. this is a stress rating only and functional operation of the device at these or any other condi- tions above those indica ted in the operational sections of this specificat ion is not implied. exposure to absolute maximum rating conditions may affect device reliability. power dissipation value is based on the maximum allowable die temperature and the thermal resistance of the package. symbol parameter min typ max unit test conditions v il input low voltage -0.5 0.2 v cc - 0.1 v v ih input high voltage except xtal1, rst 0.2 v cc + 0.9 v cc + 0.5 v v ih1 input high voltage, xtal1, rst 0.7 v cc v cc + 0.5 v v ol output low voltage: p0, ale, psen 0.45 v i ol = 1.6 ma v oh output high voltage: p0, ale, psen 0.9 v cc vi oh = 10 a v ol1 output low voltage: p3, p1.2, p1.6, p1.7 0.45 v i ol = 0.8 ma v oh1 output high voltage: p3, p1.2, p1.6, p1.7 0.9 v cc vi oh = -10 a i il logical 0 input current ports 2 to 5 and p1.2, p1.6, p1.7, if weak pull-up enabled -50 a vin = 0.45 v i li input leakage current 10 a 0.45 v < v in < v cc i tl logical 1 to o transistion current, port 51 configuration ? 650 av in = 2 v r medium medium pullup resistor 10 k r weak weak pullup resistor 100 k cio capacitance of i/o buffer 10 pf fc = 1mhz t a = 25 c dv cc digital supply voltage 3 3.4 3.6 v c l = 470 nf di cc digital supply output current (dvcc pin) 10 ma c l = 100 nf f ck_cpu = 24 mhz v pfdp power fail high level threshold 2.8 3 v v pfdm power fail low level threshold 2,5 2.6 v t rise, t fall v dd rise and fall time 1 s 600 second r rst internal reset pull-up resistor 5 10 30 k
8 at83c23ok 4307cs?scr?03/07 i pd power down consumption 60a 40a 200a 200a vcc = 5.5v vcc = 3.6v i ccidle power supply current in idle mode 0.4*f+2 ma vcc = 5.5v (f in mhz) i ccop power supply current in active mode with dc/dc on 1.6*f+2 ma vcc = 5.5v (f in mhz) i ccop power supply current in active mode with dc/dc off 0.8*f+2 ma vcc = 5.5v (f in mhz) symbol parameter min typ max unit test conditions
9 at83c23ok 4307cs?scr?03/07 i cc current test conditions figure 3. power down mode figure 4. active and idle mode led?s note: 1. (t a = -20 c to +50 c, v cc - v ol = 2 v ) all other pins are disconnected. ea ipd v cc v cc (nc) p0 xtal2 xtal1 vss v cc pllf gnd gnd li av cc gnd avss v cc gnd all other pins are disconnected. ea v cc icc v cc v cc (nc) p0 xtal2 xtal1 vss v cc clock signal pllf gnd gnd li av cc gnd avss symbol parameter min typ max unit test conditions i ol output low current, p3.0 and p3.7 led modes 1 2 5 3 6 10 5 8 20 ma ma ma 2 ma configuration 4 ma configuration 10 ma configuration
10 at83c23ok 4307cs?scr?03/07 smart card interface card vcc 5v (for ie c7816-3 class a cards) symbol parameter min typ max unit test conditions vcc power supply 3.0 5.5 v ci cc_ovf card supply current overflow 100 ma cv cc card supply voltage 4.6 5.4 v v cc min = 4.0v, ci cc = 60 ma v cc min = 3.0v, ci cc = 30 ma ripple on card voltage 200 mv 0 < cicc < 60 ma cv cc card supply voltage during spike on icc 4.5 5.5 max. charge 20 na.s max. duration 400 ns max. variation ci cc 100 ma t off cvcc to 0 750 s cload=10f, lload=10h vcard = cvcc to 0.4v t on 0 to cvcc 750 s cload=10f, lload=10h vcard = 0v to cvcc with boost at 60% card vcc 3v power supply (f or iec7816-3 class b cards) symbol parameter min typ max unit test conditions vcc power supply 3.0 5.5 v ci cc_ovf card supply current overflow 100 ma cv cc card supply voltage 2.76 3.24 v v cc min = 3.6v, ci cc = 55ma v cc min = 3.0v, ci cc = 30 ma ripple on vcard 200 mv 0 < ci cc < 55ma cv cc card supply voltage during spike on icc 2.7 3.3 v maxi. charge 10na.s max. duration 400 ns max. variation ci cc 50ma t off cvcc to 0 750 s cload=10f, lload=10h vcard = cvcc to 0.4v t on 0 to cvcc 750 s cload=10f, lload=10h vcard = 0v to cvcc with boost at 60%
11 at83c23ok 4307cs?scr?03/07 notes: 1. test conditions, capacitor 10 f, inductance 10 h. 2. ceramic x7r, smd type capacitor with minimum esr or 250 m is mandatory notes: 1. the voltage on clk should remain between -0.3v and v cc +0.3v during dynamic operation. card vcc 1.8v power supply (for iec7816-3 class c cards) symbol parameter min typ max unit test conditions vcc power supply 3.0 5.5 v ci cc_ovf card supply current overflow 100 ma cv cc card supply voltage 1.68 1.92 v ci cc = 35 ma t off cvcc to 0 750 s cload=10f, lload=10h vcard = cvcc to 0.4v t on 0 to cvcc 750 s cload=10f, lload=10h vcard = 0v to cvcc with boost at 60% smart card cclk, dc parameters symbol parameter min typ max unit test conditions v ol output low voltage 0 (1) 0.4 0.15 cv cc 0.15 cv cc v i oh = 50 a (5v until 2009) i oh = 100 a (5v from 2009) i oh = 100 a (3v & 1.8v) i ol output low current 15 ma v oh output high voltage cv cc -0,5 0.8 cv cc 0.8 cv cc cv cc v i oh = 50 a (+5v until 2009) i oh = 100 a (+5v from 2009) i oh = 100 a (+3v & 1.8v) i oh output high current 15 ma t r t f rise and fall delays 14.5 15.5 32 ns c in =30pf (5v) c in =30pf (3v) c in =30pf (1.8v) voltage stability -0.25 cv cc -0.5 0.4 cv cc cv cc + 0.25 v low level high level frequency variation (jitter) 1% cycle ratio 45% 55% smart card cio, dc parameters symbol parameter min typ max unit test conditions v il input low voltage 0 (1) 0.2 cv cc v i il input low current 500 a v ih input high voltage 0.6 cv cc cv cc v i ih input high current -20 / +20 a v ol output low voltage 0 (1) 0.15 cv cc v i ol = 1ma (5v & 3v)) i ol = 0.5 ma (1.8v) external 10k pull-up tied to cv cc
12 at83c23ok 4307cs?scr?03/07 note: 1. the voltage on rst should remain between -0.3v and v cc +0.3v during dynamic operation. note: 1. the voltage on rst should remain between -0.3v and v cc +0.3v during dynamic operation. i ol output low current 15 ma v oh output high voltage 0.8 cv cc cv cc (1) v i oh = 20 a external 10k pull-up resistor tied to cv cc i oh output high current 15 ma voltage stability -0.25 0.8 cv cc 0.4 cv cc + 0.25 vlow level high level t r t f rise and fall delays 0.8 sc in =30pf. smart card rst, cc4, cc8, dc parameters symbol parameter min typ max unit test conditions v ol output low voltage 0 (1) 0.4 0.12 cv cc 0.12 cv cc v i ol = 50 ? (5 v until 2009) i ol = 200 ? (5 v from 2009) i ol = 200 ? (3v & 1.8v) i ol output low current 15 ma v oh output high voltage cv cc -05 0.8 cv cc 0.8 cv cc cv cc (1) v i oh = 50 ? (+5v until 2009) i oh = 150 ? (+5v from 2009) i oh = 150 ? (+3v & 1.8v) i oh output high current 15 ma t r t f rise and fall delays 0.8 sc in =30 pf voltage stability -0.25 cv cc -0.5 0.4 cv cc cv cc + 0.25 low level high level smart card cio, dc parameters symbol parameter min typ max unit test conditions card presence (p1.2) dc parameters symbol parameter min typ max unit test conditions i ol1 cpres weak pull-up output current 3 10 25 a p1.2=1, short to vss pull-up enabled
13 at83c23ok 4307cs?scr?03/07 usb interface figure 5. usb interface symbol parameter min typ (5) max unit v ref usb reference voltage 3.0 3.6 v v ih input high voltage for d+ and d- (driven) 2.0 4.0 v v ihz input high voltage for d+ and d- (floating) 2.7 3.6 v v il input low voltage for d+ and d- 0.8 v v oh output high voltage for d+ and d- 2.8 3.6 v v ol output low voltage for d+ and d- 0.0 0.3 v
14 at83c23ok 4307cs?scr?03/07 ordering information part number voltage range (v) temperature range package packing at83c23ok203-sisim 3.0 - 5.5 industrial plcc28 stick AT83C23OK203-SIRIM 3.0 - 5.5 industrial plcc28 tape & reel at83c23ok203-ratim 3.0 - 5.5 industrial vqfp32 tray at83c23ok203-rarim 3.0 - 5.5 industrial vqfp32 tape & reel at83c23ok203-ratum 3.0 - 5.5 industrial & green vqfp32 tray at83c23ok203-rarum 3.0 - 5.5 industrial & green vqfp32 tape & reel at83c23ok203-putum 3.0 - 5.5 industrial & green qfn32 tray at83c23ok203-purum 3.0 - 5.5 industrial & green qfn32 tape & reel
15 at83c23ok 4307cs?scr?03/07 mechanical description vqfp32 package
16 at83c23ok 4307cs?scr?03/07 qfn32 package
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